In the fabrication of semiconductor devices at the BEOL level and prior to entering the damascene phase, it is crucial to provide vias that are appropriate for the first metallization step. These vias have to be free of any dielectric film to guarantee a conductive connection with the metal that is added in the next step. Furthermore, the surface of the vias should be smooth to allow for a homogenous phase transition when the metal is added. These vias are normally generated by an etching process.
The etching process of choice is in many cases reactive ion etching (RIE), which removes material using a gaseous chemical process in a radiofrequency field. The advantage of RIE is that the method can be used both anisotropically and isotropically. The anisotropic process finds application in nanotechnology. The isotropic process, on the other hand, finds application in all areas of microtechnology, including the cleaning steps for vias on silicon wafers.
A drawback of RIE is that the waste material, i.e., the material etched from the semiconductor surface, is not easily expurgated from the etch chamber and forms polymeric material. Over time and several RIE process repetitions, the waste material builds up inside the etch chamber. It follows that the polymeric build up interferes with subsequent RIE processes resulting in slower etch rates, degraded chamber performance amounting to decreased product quality. In order to maintain high yields, enhanced chamber maintenance and chamber cleaning are necessary causing production down time and increasing costs.
Another disadvantage is the destructive impact of current RIE processes onto the photosensitive top layer of a semiconductor devices. Intense sputtering conditions cause damages to the photosensitive layer and may have an exacerbating effect during subsequent steps.
For at least these shortcomings, it is desirable to apply methods that ensure manufacturability without compromising chamber performance, etch rates, and integrity of the semiconductor structure.